Architecture of any multicore processor

 

On the basis of common features or characteristics the multicore processor architecture can be broadly classified as : application class, power/performance, processing elements, memory system, and accelerators/integrated peripherals.

i ) Application Class: In this the architecture of multicore processor is mainly focused on the requirement of specific application domain. This results in several positive outcomes but often the multicore for a particular application domain cannot be used or have adverse effects when used in other domains. An application may fall in one of the two classes in their execution phase: data processing dominated and control processing dominated. In data dominated the operations are performed on a set of data with little or no data reusage. This fact gives the processing to be performed in parallel with high throughput and performance for a large data. Some of the applications are image processing, audio processing, wireless base band processing etc. In control processing dominated class the application deals with high level of conditional branching and parallelism with a high amount of data reuse. For example, data compression, decompression, network processing and query processing.

 ii) Power/performance: Some applications need good power/performance requirements. For example in play stations the game provides a real time environment. This feel can only be provided if the application uses the multicore architecture with first class performance design constraints. But such games when comes in mobile phones needs a good battery life and thus power is also a constraint for such applications. Thus, for such application the architecture of the processor should be such that power consumed should be less and performance output is high.

iii) Processing elements: The architecture of multicore depends on the type of instruction set architecture which may be Reduced Instruction Set Computer (RISC) or Complex Instruction Set Computer (CISC). Processing element used in core also defines the architecture of multicore processor. On the basis of processing element there are two types of cores: in-order cores and out-order cores. In-order cores have small die area, low consumption of power and can work easily with large applications having larger level of parallelism and less sensitive serial sections. The outorder cores needs more die area and is not suitable for power efficient systems. However, such cores perform well for applications having a variety of behaviors and high performance and output is needed. To increases the performance of multicore processor it is better to use Single-Instruction Multiple-Data (SIMD) or Very Long Instruction Word (VLIW) architectures.

iv) Memory systems: The memory system architecture point of view includes the caches and their levels, consistency model, cache coherence support and the intrachip interconnect. These determine the way in which the cores will communicate providing a high efficient programmability and parallelism to the system. The consistency model basically defines the order in which the instructions are to be executed. The strong consistency models have strict ordering constraints and are difficult to design whereas weak models are less complex and are easier to design memory system. The cache configuration basically deals with the amount, number and levels of caches required by the system. The amount of cache required for an architecture point of view depends on the application. More the data is reused more will be the size of cache needed. Larger caches give better performance but it also includes the effect on die area and power budget. The number of cache levels depends on how far away the main memory is from each processing elements. The intrachip interconnect is responsible for general communication among processing elements and cache coherence. The interconnect for intercore communication includes bus, ring, crossbar and network on chip. The type of programming paradigm the architecture supports depends cache coherence. Cache coherence defines the consistency of data visible to all other processing cores.

v) Accelerators/ integrated peripherals: Another architecture point of view in which a multicore processor can be designed is with respect to accelerators or integrated peripherals such as highly specialized processors that cannot be made inaction efficiently by the software.